1. Field of the Invention
The present invention relates to a boosting circuit, and more particularly, to a boosting circuit capable of preventing giving stress to a cell due to a high voltage applied to word lines of the cell, preventing unnecessary consumption of current and securing the read-out margin, wherein a first boosting means and a second boosting means are precharged with a first potential in a standby mode, and the cell current of the flash memory cell is varied according to a boosting potential of the first boosting means in a read-out mode, whereby the output of a flash memory cell sensing circuit unit is changed and the second boosting means is thus boosted to a third potential or a fourth potential.
2. Background of the Related Art
In order to read out the status of cells in flash memory devices for low voltage, it is required that a voltage higher than the operating voltage be applied to the word lines of the cells. For this, a method of boosting the operating voltage to produce a voltage higher than the operating voltage has been employed. If the operating voltage is boosted twice when the operating supply power of the flash memory cell for low voltage is about 1.8xcx9c2.4V, the boosting voltage is about 4xcx9c5.4V or higher. If the boosting voltage of over 5.5V is applied to the word lines, however, it is almost same to a program verification voltage of about 6V. Due to this, there are problems that the read-out margin could not be secured and the lifetime of the cell is shortened due to stress applied thereto.
Accordingly, the present invention is contrived to substantially obviate one or more problems due to limitations and disadvantages of the related art, and an object of the present invention is to provide a boosting circuit for producing a boosting voltage by which a read-out margin could be sufficiently secured.
Another object of the present invention is to provide a boosting circuit capable of sufficiently securing the read-out margin and preventing stress from being applied to the cell, using the flash memory cell to control the boosting voltage.
The boosting circuit according to the present invention is characterized in that it comprises a reference voltage generating circuit unit for generating a reference voltage according to an address transition detection signal that is delayed by a given time, a first boosting means for outputting a given boosting voltage according to the address transition detection signal and an inverted signal thereof, a sensing circuit for sensing a flash memory cell according to the reference voltage and the boosting voltage of the first boosting means, wherein the output signal of the sensing circuit is changed depending on the boosting voltage of the first boosting means applied to a gate terminal of the flash memory cell, a switching circuit for applying the boosting voltage of the first boosting circuit or the power supply voltage depending on the boosting voltage of the first boosting circuit and the output signal of the sensing circuit, and a second boosting means for supplying the power supply voltage to an output terminal according to the address transition detection signal, wherein the second boosting means is boosted according to the boosting voltage of the first boosting circuit or the power supply voltage to output the boosting voltages of two levels to the output terminal.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.